reversehard

Riscy Schenanigans

miptctf

Crackme on custom RISC-V SCR1 processor with custom instructions, simulated via Verilator in Docker. Algorithm is XOR-linear (Feistel network with key mixing), enabling analytical solution via GF(2) Gaussian elimination instead of brute-force. Key technique: bit-extraction oracle via hex patching to extract register values from PASS/FAIL simulation output.

$ ls tags/ techniques/
gf2_linear_algebragaussian_eliminationbit_extraction_oraclehex_patchingverilator_analysis

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